EDN

How to invert three signals with only two NOT gates (and *no* XOR gates): Part 2

In the 8th May 2006 issue of EE Times, I published a “Brain Boggler” in my Logically Speaking column. The idea is that we have a black box with three inputs called A, B, and C; and three outputs ...
Electronic Design

Six MOSFETs, Four Pins Create Two-Input Combo NAND/NOR Gate

This CMOS two-input combination NAND/NOR gate is a three-input, fourpin logic gate. A p-channel enhancementtype MOSFET (Q1) and an n-channel enhancement-type MOSFET (Q4) form one complementary ...
EDN

How to invert three signals with only two NOT gates (and *no* XOR gates): Part 1

Good Grief Charlie Brown! Ever since I presented the “Black Box Brain Boggler” in myLogically Speaking column in the 8th May issue of EE Times, I've been running around in ever-decreasing circles ...